IBM Achieves the Unthinkable: Chip Technology Below 1 Nanometre
In a landmark moment for the global semiconductor industry, IBM has announced what it claims to be the world's first known chip technology that operates at a scale below 1 nanometre. To put that into perspective, a single strand of human DNA is roughly 2.5 nanometres wide — meaning IBM's latest innovation is smaller than life's most fundamental building block. This is not just an incremental improvement in chip design; it represents a potential paradigm shift in how we think about computing power, energy efficiency, and the physical limits of technology.
The announcement has sent ripples through the tech world, drawing comparisons to the moment transistors first moved from laboratory curiosity to commercial reality. While IBM has been careful to note that this technology is still years away from mass production, the implications of what has been achieved in the lab cannot be overstated.
What Is the 'Block of Flats' Design and Why Does It Matter?
Perhaps the most intriguing aspect of IBM's breakthrough is the architectural approach behind it. Engineers and researchers have described the new design philosophy using a surprisingly relatable metaphor: a "block of flats." Rather than laying transistors out flat across a chip surface in a traditional single-layer arrangement — much like a sprawling suburban neighbourhood — IBM's new approach stacks components vertically, much like floors in a residential apartment building.
This stacked, three-dimensional structure allows an extraordinary number of transistors to be packed into an incredibly small footprint. Vertical integration has been a growing trend in semiconductor engineering, but pushing it to the sub-nanometre scale is an entirely different challenge — one that IBM appears to have met head-on. The result is a chip architecture that can theoretically deliver significantly greater processing power while consuming far less physical space and energy than current designs allow.
The genius of the "block of flats" approach lies in its efficiency. In traditional chip layouts, the distance electrons must travel between components becomes a critical bottleneck as chips shrink. By stacking components vertically and reducing those distances in three dimensions rather than just two, IBM's design sidesteps some of the most persistent physical limitations that have frustrated chip engineers for decades.
The End of Moore's Law? Not Quite — But a New Chapter Is Opening
For decades, the semiconductor industry has been guided by Moore's Law — the observation made by Intel co-founder Gordon Moore in 1965 that the number of transistors on a chip doubles approximately every two years. For most of that time, this prediction held remarkably true, driving exponential improvements in computing performance. However, as chip sizes have shrunk to just a few nanometres, engineers have run headlong into the stubborn laws of quantum physics, and many experts have declared that Moore's Law is finally running out of road.
IBM's sub-1 nanometre breakthrough does not necessarily resurrect Moore's Law in its classic form, but it does suggest that the story of chip miniaturisation is far from over. Rather than simply shrinking transistors further along a flat plane, the industry is increasingly looking to novel architectures — of which IBM's "block of flats" design is a prime example — to continue delivering performance gains even as traditional scaling becomes impossible.
This shift in thinking, from two-dimensional to three-dimensional chip design, could define the next era of semiconductor development, influencing everything from consumer smartphones to artificial intelligence supercomputers and quantum computing systems.
Real-World Applications: What Could Sub-1 Nanometre Chips Power?
When this technology eventually reaches production — and IBM's researchers are cautiously optimistic that it will — the applications could be transformative across virtually every industry. Consider the following potential use cases:
- Artificial Intelligence: AI model training and inference require enormous computational resources. Smaller, more efficient chips could dramatically reduce the energy footprint of AI data centres while accelerating the performance of machine learning systems.
- Mobile Devices: Smartphones and wearables stand to benefit enormously. Sub-1 nanometre chips could extend battery life, improve processing speeds, and enable AI capabilities that currently require cloud connectivity to be run entirely on-device.
- Healthcare Technology: Ultra-compact chips could power the next generation of implantable medical devices, biosensors, and diagnostic tools, bringing precision computing directly into the human body with minimal power requirements.
- Autonomous Vehicles: Self-driving cars demand real-time data processing at extraordinary speeds. More powerful, energy-efficient chips could make autonomous systems faster, safer, and more reliable.
- Edge Computing: As the Internet of Things (IoT) continues to expand, tiny chips capable of significant computation could push intelligence to the very edge of networks, reducing latency and reliance on centralised cloud infrastructure.
The Road to Production: Challenges Still Ahead
IBM has been transparent about the fact that this breakthrough, while genuinely historic, is not yet ready for commercial production. Moving from a laboratory demonstration to a manufacturable, scalable chip technology is one of the most complex engineering challenges in the world. New materials, new fabrication techniques, and entirely new approaches to quality control will all need to be developed and refined before sub-1 nanometre chips can roll off production lines at the volumes the global market demands.
Manufacturing at this scale also raises significant questions around cost. Cutting-edge chip fabrication facilities — known as fabs — already cost tens of billions of dollars to build and operate. The equipment required to work at sub-nanometre scales will push those costs even higher, at least initially, meaning that the first beneficiaries of this technology are likely to be high-value sectors such as defence, aerospace, and enterprise computing rather than everyday consumer electronics.
Additionally, the semiconductor supply chain — already under enormous strain following the global chip shortages of recent years — will need to evolve considerably to support a new generation of chip architectures. Partnerships between chip designers, materials scientists, and equipment manufacturers will be essential to bridging the gap between today's lab results and tomorrow's commercial reality.
IBM's Position in the Global Chip Race
This announcement reinforces IBM's status as one of the world's leading chip research organisations, even as it has exited the consumer chip manufacturing business. IBM has a long history of semiconductor firsts — it was among the pioneers of silicon-germanium chip technology and has consistently pushed the boundaries of transistor miniaturisation. Its research divisions continue to collaborate closely with industry partners including Samsung and previously with GlobalFoundries, ensuring that its laboratory breakthroughs have a pathway toward real-world adoption.
In a global technology landscape increasingly defined by competition between the United States, China, Taiwan, and South Korea for semiconductor supremacy, IBM's sub-1 nanometre achievement is also a statement of strategic importance — a signal that American chip innovation remains at the cutting edge of what is physically possible.
Conclusion: A Glimpse Into the Future of Computing
IBM's sub-1 nanometre chip breakthrough, built around the elegantly described "block of flats" vertical design, is a milestone that deserves to be celebrated — carefully, and with an eye on the long road still ahead. The technology is real, the science is sound, and the potential applications are staggering. What remains is the hard, painstaking work of turning a laboratory achievement into a commercially viable product that can reshape the computing landscape for decades to come. When that day arrives, it may well be looked back upon as the moment the next great chapter in the history of the microchip truly began.